Why TLVR Will Not Kill MLCCs—and May Accelerate the Shift to VPD
The Market Narrative vs. System-Level Reality:
A sharp decline in the stock prices of passive-component suppliers (Murata, Samsung Electro-Mechanics, Taiyo Yuden, Yageo, Walsin Technology, Holy Stone, Fenghua) was widely blamed on the adoption of TLVR in AI GPUs. The prevailing argument is that TLVR's improved transient response allows for the removal of many board-level MLCCs, thus reducing demand. The author contends this overlooks the simultaneous and more powerful trend of increasing AI chip power requirements.
Escalating Power Delivery Challenges:
- Power & Current Growth: AI GPUs are moving from consuming hundreds of watts to several kilowatts.
- Low Voltage Operation: Core operating voltages remain in the 0.6V to 1.0V range.
- Resulting Effects: This combination drives current into the kiloampere range, which severely worsens issues like parasitic resistance, parasitic inductance, voltage droop, and load transients across the entire power path.
The Shift to Distributed Decoupling:
The author argues the core architectural shift is not about TLVR replacing MLCCs, but about the power delivery network (PDN) evolving from a centralized, board-level decoupling model to a distributed one. In this new model, capacitance is strategically placed across multiple locations:
- The main board
- The package underside
- The interposer
- The voltage regulators
- The backside of the chip itself
Redefining Technology Roles:
- TLVR: Positioned as an enhancement to the existing lateral power-delivery architecture, not a revolutionary replacement for capacitors. It may reduce some board-level output capacitance but does not eliminate the need for decoupling capacitors system-wide.
- MLCCs: The demand for MLCCs will not disappear. Instead, it will shift from a simple component count to a focus on structural upgrades and performance metrics like higher capacitance, specific voltage ratings, low ESL (Equivalent Series Inductance), low ESR (Equivalent Series Resistance), wider bandwidth, and improved thermal endurance and reliability.
- Future Architectures: The next significant architectural evolution in power delivery includes in-package Integrated Voltage Regulators (IVR), embedded Deep Trench Capacitors (eDTC), backside power delivery, and ultimately Vertical Power Delivery (VPD).
Stock Market vs. Technical Demand:
The analysis separates stock market performance from fundamental demand. The stock correction is presented as a reflection of changing growth expectations or capital allocation, not a direct indicator of a collapse in MLCC consumption. The affected companies have diverse product portfolios (automotive, industrial, consumer electronics) and different exposures to various capacitor types, making TLVR an overly simplistic explanation for a market-wide selloff.
This is a sharp, necessary correction to a simplistic market narrative. The idea that a single technology (TLVR) would simply erase demand for a foundational component like MLCCs ignores the history of high-performance computing, where efficiency gains are immediately spent on pushing performance. As AI chips become power-hungry beasts demanding kilowatts at sub-1V levels, the entire power delivery network becomes a first-order design problem. The real story isn't component count reduction; it's an architectural war against parasitic inductance and voltage droop. This means pushing capacitance closer to the silicon—on-package, on-interposer, and eventually on-chip. TLVR is a step in that direction, but it's part of a larger trend that will ultimately drive demand for more specialized, higher-performance, and strategically placed capacitors, not fewer.
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